Network-on-Chip Architectures A Holistic Design Exploration /
The continuing reduction of feature sizes into the nanoscale regime has led to dramatic increases in transistor densities. Integration at these levels has highlighted the criticality of the on-chip interconnects. Network-on-Chip (NoC) architectures are viewed as a possible solution to burgeoning glo...
| Main Authors: | , , |
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| Corporate Author: | |
| Format: | Electronic |
| Language: | English |
| Published: |
Dordrecht :
Springer Netherlands,
2010.
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| Series: | Lecture Notes in Electrical Engineering,
45 |
| Subjects: | |
| Online Access: | https://ezaccess.library.uitm.edu.my/login?url=http://dx.doi.org/10.1007/978-90-481-3031-3 |