Timing Optimization Through Clock Skew Scheduling

• Corporate Author: SpringerLink (Online service)
• Other Authors: Kourtev, Ivan S. (Editor), Taskin, Baris. (Editor), Friedman, Eby G. (Editor)
• Format: Electronic
• Language: English
• Published: Boston, MA : Springer US, 2009.
• Subjects: Engineering.; Computer aided design.; Electronics.; Systems engineering.; Circuits and Systems.; Computer-Aided Engineering (CAD, CAE) and Design.; Electronics and Microelectronics, Instrumentation.; Electronic and Computer Engineering.
• Online Access: https://ezaccess.library.uitm.edu.my/login?url=http://dx.doi.org/10.1007/978-0-387-71056-3

Timing Optimization Through Clock Skew Scheduling focuses on optimizing the timing of large scale, high performance, digital synchronous systems. A particular emphasis is placed on algorithms for non-zero clock skew scheduling to improve the performance and reliability of VLSI circuits. This researc...

Table of Contents:

• Introduction
• VLSI Systems
• Signal Delay in VLSI Systems
• Timing Properties of Synchronous Systems
• Clock Skew Scheduling and Clock Tree Synthesis
• Clock Skew Scheduling of Level-Sensitive Circuits
• Clock Skew Scheduling for Improved Reliability
• Delay Insertion and Clock Skew Scheduling
• Practical Considerations
• Clock Skew Scheduling in Rotary Clocking Technology
• Experimental Results
• Conclusions.