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081017s2007 caua fsb 000 0 eng d |
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|a 9781598291230 (electronic bk.)
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|a 1598291238 (electronic bk.)
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|a 9781598291124 (pbk.)
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|a 159829122x (pbk.)
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|a 10.2200/S00093ED1V01Y200707CAC003
|2 doi
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|a 182519248 (OCLC)
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|a (CaBNvSL)gtp00531516
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|a CaBNvSL
|c CaBNvSL
|d CaBNvSL
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|a QA76.58.
|b .O583 2007
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|a 004.35
|2 22
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|a Olukotun, Kunle.
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|a Chip multiprocessor architecture
|b techiniques to improve throughput and latency /
|c Kunle Olukotun, Lance Hammond, and James Laudon.
|h [electronic resource] :
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|a 1st ed.
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|a San Rafael, Calif (1537 Fourth Street, San Rafael, CA 94901 USA) :
|b Morgan & Claypool Publishers,
|c 2007.
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|a 1 electronic text (viii, 145 p. : ill.) :
|b digital file.
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|a Synthesis lectures on computer architecture,
|v #3
|x 1935-3243 ;
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|a Part of: Synthesis digital library of engineering and computer science.
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|a Title from PDF t.p. (viewed on Nov. 7, 2008).
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|a Series from website.
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|a Includes bibliographical references.
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|a The case for CMPs -- Improving throughput -- Improving latency automatically -- Improving latency using manual parallel programming -- A multicore world: The future of CMPs.
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|a Abstract freely available; full-text restricted to subscribers or individual document purchasers.
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|a Compendex
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|a INSPEC
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|a Google scholar
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|a Google book search
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|a Chip multiprocessors - also called multi-core microprocessors or CMPs for short - are now the only way to build high-performance microprocessors, for a variety of reasons. Large uniprocessors are no longer scaling in performance, because it is only possible to extract a limited amount of parallelism from a typical instruction stream using conventional superscalar instruction issue techniques. In addition, one cannot simply ratchet up the clock speed on today's processors, or the power dissipation will become prohibitive in all but water-cooled systems. Compounding these problems is the simple fact that with the immense numbers of transistors available on today's microprocessor chips, it is too costly to design and debug ever-larger processors every year or two.
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|a Also available in print.
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|a Mode of access: World Wide Web.
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|a System requirements: Adobe Acrobat Reader.
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|a Parallel processing (Electronic computers)
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|a High performance processors.
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|a Computer architecture.
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|a Chip multiprocessors (CMPs)
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|a Multi-core microprocessors.
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|a Parallel processing.
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|a Throughput sensitive applications.
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|a Latency-sensitive applications.
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|a SPEC benchmarks.
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|a Java applications.
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|a JRPM virtual machine.
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|a Transactional memory.
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|a Hammond, Lance.
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|a Laudon, James.
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|a Synthesis digital library of engineering and computer science.
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|a Synthesis lectures on computer architecture (Online) ;
|v #3.
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|u https://ezaccess.library.uitm.edu.my/login?url=http://dx.doi.org/10.2200/S00093ED1V01Y200707CAC003
|3 Abstract with links to full text
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