Networks on Chip
As the number of processor cores and IP blocks integrated on a single chip is steadily growing, a systematic approach to design the communication infrastructure becomes necessary. Different variants of packed switched on-chip networks have been proposed by several groups during the past two years. T...
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| Other Authors: | , |
| Format: | Electronic |
| Language: | English |
| Published: |
Boston, MA :
Springer US,
2003.
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| Online Access: | View fulltext via EzAccess |