Power Aware Design Methodologies
Power Aware Design Methodologies was conceived as an effort to bring all aspects of power-aware design methodologies together in a single document. It covers several layers of the design hierarchy from technology, circuit logic, and architectural levels up to the system layer. It includes discussion...
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Other Authors: | , |
Format: | Electronic |
Language: | English |
Published: |
Boston, MA :
Springer US,
2002.
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Online Access: | View fulltext via EzAccess |
Table of Contents:
- CMOS Device Technology Trends for Power-Constrained Applications
- Low Power Memory Design
- Low-Power Digital Circuit Design
- Low Voltage Analog Design
- Low Power Flip-Flop and Clock Network Design Methodologies in High-Performance System-on-a-Chip
- Power Optimization by Datapath Width Adjustment
- Energy-Efficient Design of High-Speed Links
- System and Microarchitectural Level Power Modeling, Optimization, and Their Implications in Energy Aware Computing
- Tools and Techniques for Integrated Hardware-Software Energy Optimizations
- Power-Aware Communication Systems
- Power-Aware Wireless Microsensor Networks
- Circuit and System Level Power Management
- Tools and Methodologies for Power Sensitive Design
- Reconfigurable Processors Ớ The Road to Flexible Power-Aware Computing
- Energy-Efficient System-Level Design.