Offset Reduction Techniques in Highspeed Analog-To-Digital Converters Analysis, Design and Tradeoffs /
Offset Reduction Techniques in High-Speed Analog-to-Digital Converters analyzes, describes the design, and presents test results of Analog-to-Digital Converters (ADCs) employing the three main high-speed architectures: flash, two-step flash and folding and interpolation. The advantages and limitatio...
| Main Authors: | , |
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| Corporate Author: | |
| Format: | Electronic |
| Language: | English |
| Published: |
Dordrecht :
Springer Netherlands,
2009.
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| Series: | Analog Circuits and Signal Processing Series
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| Subjects: | |
| Online Access: | https://ezaccess.library.uitm.edu.my/login?url=http://dx.doi.org/10.1007/978-1-4020-9716-4 |