Fault tolerant computer architecture

• Main Author: Sorin, Daniel J.
• Format: Electronic
• Language: English
• Published: San Rafael, Calif. (1537 Fourth Street, San Rafael, CA 94901 USA) : Morgan & Claypool Publishers, c2009.
• Series: Synthesis lectures on computer architecture (Online), # 5.
• Subjects: Fault-tolerant computing.; Self-stabilization (Computer science); Computer architecture.
• Online Access: View fulltext via EzAccess
• Item Description: Part of: Synthesis digital library of engineering and computer science.; Title from PDF t.p. (viewed on June 4, 2009).; Series from website.
• Physical Description: 1 electronic text (xii, 103 p. : ill.) : digital file.; Also available in print.
• Format: Mode of access: World Wide Web.; System requirements: Adobe Acrobat reader.
• Bibliography: Includes bibliographical references.
• ISBN: 9781598299540 (electronic bk.)
• ISSN: 1935-3243
• Access: Abstract freely available; full-text restricted to subscribers or individual document purchasers.

For many years, most computer architects have pursued one primary goal: performance. Architects have translated the ever-increasing abundance of ever-faster transistors provided by Moore's law into remarkable increases in performance. Recently, however, the bounty provided by Moore's law has been accompanied by several challenges that have arisen as devices have become smaller, including a decrease in dependability due to physical faults. In this book, we focus on the dependability challenge and the fault tolerance solutions that architects are developing to overcome it. The two main purposes of this book are to explore the key ideas in fault-tolerant computer architecture and to present the current state-of-the-art--over approximately the past 10 years--in academia and industry.