Advanced Verification Techniques: A SystemC Based Approach for Successful Tapeout
"As chip size and complexity continues to grow exponentially, the challenges of functional verification are becoming a critical issue in the electronics industry. It is now commonly heard that logical errors missed during functional verification are the most common cause of chip re-spins, and t...
| Main Authors: | , , |
|---|---|
| Corporate Author: | |
| Format: | Electronic |
| Language: | English |
| Published: |
Boston, MA :
Springer US,
2004.
|
| Subjects: | |
| Online Access: | View fulltext via EzAccess |