Reuse Methodology Manual for System-on-a-Chip Designs

Features of the Third Edition: UP TO DATE STATE OF THE ART REUSE AS A SOLUTION FOR CIRCUIT DESIGNERS A CHRONICLE OF "BEST PRACTICES" ALL CHAPTERS UPDATED AND REVISED GENERIC GUIDELINES-NON TOOL SPECIFIC EMPHASIS ON HARD IP AND PHYSICAL DESIGN Reuse Methodology Manual for System-on-a-Chip D...

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Bibliographic Details
Main Authors: Keating, Michael. (Author), Bricaud, Pierre. (Author)
Corporate Author: SpringerLink (Online service)
Format: Electronic
Language:English
Published: Boston, MA : Springer US, 2002.
Edition:3.
Subjects:
Online Access:View fulltext via EzAccess
Table of Contents:
  • The System-on-Chip Design Process
  • System-Level Design Issues: Rules and Tools
  • The Macro Design Process
  • RTL Coding Guidelines
  • Macro Synthesis Guidelines
  • Macro Verification Guidelines
  • Developing Hard Macros
  • Macro Deployment: Packaging for Reuse
  • System Integration with Reusable Macros
  • System-Level Verification Issues
  • Data and Project Management
  • Implementing Reuse-Based SoC Designs.