System-Level Validation High-Level Modeling and Directed Test Generation Techniques /
This book covers state-of-the art techniques for high-level modeling and validation of complex hardware/software systems, including those with multicore architectures.� Readers will learn to avoid time-consuming and error-prone validation from the comprehensive coverage of system-level validation, i...
Main Authors: | , , , |
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Corporate Author: | |
Format: | Electronic |
Language: | English |
Published: |
New York, NY :
Springer New York : Imprint: Springer,
2013.
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Subjects: | |
Online Access: | https://ezaccess.library.uitm.edu.my/login?url=http://dx.doi.org/10.1007/978-1-4614-1359-2 |
Table of Contents:
- Introduction
- Modeling and Specification of SoC Designs
- Automated Generation of Directed Tests
- Functional Test Compaction.-�Property Clustering and Learning Techniques
- Decision Ordering Based Learning Techniques
- Synchronized Generation of Directed Tests
- Learning-Oriented Property Decomposition Approaches
- Directed Test Generation for Multicore Architectures
- Test Generation for Cache Coherence Validation.-�Reuse of System-Level Tests for Implementation Validation
- Conclusion.